µC/GUI LCD0323 Driver
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LCD0323 Driver
Supported controllers
This driver has been tested with the following LCD controllers:
- Solomon SSD0323 OLED controller
Bits per pixel
The supported color depth is 4 bpp.
Interfaces
8-bit parallel (simple bus) and serial (SPI4) bus
interfaces are supported.
Display data RAM organization
The picture above shows the relation between the display memory and the SEG and COM lines of the display.
Additional RAM requirements of the driver
This driver can be used with or without a display data cache. The data cache contains a complete copy of the contents of the display data RAM. If a cache is not used, there are no additional RAM requirements. It is recommended to use this driver with a data cache for faster display RAM access. Not using a cache degrades the performance of this driver. The amount of memory used by the cache is 4096 bytes.
Additional driver functions
None.
Hardware configuration
This driver accesses the hardware with a simple bus interface. The following table lists the macros which must be defined for hardware access:
| Macro |
Description |
| LCD_INIT_CONTROLLER |
Initialization sequence for the LCD controller. |
| LCD_READ_A1 |
Read a byte from LCD controller with A-line high. |
| LCD_WRITE_A0 |
Write a byte to LCD controller with A-line low. |
| LCD_WRITE_A1 |
Write a byte to LCD controller with A-line high. |
| LCD_WRITEM_A1 |
Write multiple bytes to LCD controller with A-line high. |
Additional configuration switches
The following table shows optional configuration switches available for this driver:
| Macro |
Description |
| LCD_CACHE |
When set to 0, no display data cache is used, which slows down the speed of the driver. Default is 1 (cache activated). |
Special requirements for certain LCD controllers
None.
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