µC/GUI LCD1781 Driver
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LCD1781 Driver
Supported controllers
This driver has been tested with the following LCD controllers:
Bits per pixel
The supported color depth is 16 bpp.
Interfaces
The driver supports 8-bit parallel (simple bus) or 4 pin SPI interface.
Display data RAM organization
The picture above shows the relation between the display memory and the SEG and COM lines of the LCD. The display memory is divided into two panes for each pixel. The lower bit of one pixel is stored in pane 0 and the higher bit is stored in pane 1.
Additional RAM requirements of the driver
This LCD driver may be used with or without a display data cache, containing a complete copy of the contents of the LCD data RAM. If a cache is not used, there are no additional RAM requirements. The amount of memory used by the cache is:
LCD_XSIZE x LCD_YSIZE x 2 bytes
Additional driver functions
None.
Hardware configuration
This driver accesses the hardware with a simple bus interface or a 4 pin SPI interface as described in the "Low-Level Configuration" Chapter. The following table lists the macros which must be defined for hardware access:
Parallel Mode
| Macro |
Description |
| LCD_INIT_CONTROLLER |
Initialization sequence for the LCD controller. |
| LCD_READ_A0 |
Read a byte from display controller with A-line low. |
| LCD_WRITE_A0 |
Write a byte to display controller with A-line low. |
| LCD_WRITE_A1 |
Write a byte to display controller with A-line high. |
| LCD_WRITEM_A1 |
Write multiple bytes to display controller with A-line high. |
Display Orientation
The SSD1781 controller supports rotating and mirroring. So it is recommended to use the hardware functions of the controller if rotating and/or mirroring is needed instead of the µC/GUI display orientation macros LCD_MIRROR_... and LCD_SWAP_XY. The configuration sample folder contains a sample which uses the hardware to rotate the output by 180 degrees. The 0xBC controller command can be used to mirror and/or rotate the display output. For more details about how to change the display orientation via the hardware functions please refer to the SSD1781 manual .
Additional configuration switches
The following table shows optional configuration switches available for this driver:
| Macro |
Description |
| LCD_FIRSTCOM0 |
This macro can be used to define the first common address to be used in the data RAM of the display controller. The value can be determined experimentally or taken from the display documentation. |
| LCD_FIRSTSEG0 |
This macro can be used to define the first segment address to be used in the data RAM of the display controller. The value can be determined experimentally or taken from the display documentation. |
| LCD_GET_BUSY |
The SSD1781 controller has a separate pin which should be used to query the busy state. This macro should return 1 if the busy line of the SSD1781 is high and 0 if the line is low. If the macro is defined it is used at the beginning of each low level driver function to wait until the driver is not busy. Example:
#define LCD_GET_BUSY() (P6 & 0x80) |
| LCD_WAIT |
If the busy line is not available the macro LCD_WAIT can be used to call a function which waits a while in dependence of the number of drawn pixels. If defined the LCD_WAIT macro is executed after each high level drawing function call of the SSD1781. Example: #define LCD_WAIT(NumPixels) OS_Delay((NumPixels + 900) / 1000) |
Special requirements for certain LCD controllers
The driver needs to work in the fixed palette mode 565. The driver does not work with other palettes. Further the driver needs to swap the red and the blue part of the color index. You should use the following macro definitions in the file LCDConf.h:
#define LCD_SWAP_RB 1
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