µC/GUI LCD8822 Driver

Supported controllers

This driver has been tested with the following LCD controllers:

  • Raio RA8822 controller

Bits per pixel

The supported color depth is 2 bpp.

Interfaces

8-bit parallel (simple bus) bus interfaces is supported.

Display data RAM organization

The picture above shows the relation between the display memory and the SEG and COM lines of the display.

Additional RAM requirements of the driver

This LCD driver may be used with or without a display data cache, containing a complete copy of the contents of the LCD data RAM. If a cache is not used, there are no additional RAM requirements.
It is recommended to use this driver with a data cache for faster LCD-access. The amount of memory used by the cache may be calculated as follows:
Size of RAM (in bytes) = (LCD_XSIZE + 7) / 8 * LCD_YSIZE * 2

Additional driver functions

None.

Hardware configuration

This driver accesses the hardware with a simple bus interface. The following table lists the macros which must be defined for hardware access:

Macro Description
LCD_INIT_CONTROLLER Initialization sequence for the LCD controller.
LCD_READ_A1 Reads a word from display controller with A-line high.
LCD_WRITEM_A1 Writes multiple words to display controller with A-line high.
LCD_WRITE_A0 Writes a word to display controller with A-line low.
LCD_WRITE_A1 Writes a word to display controller with A-line high.

Additional configuration switches


Macro Description
LCD_CACHE When set to 0, no display data cache is used, which slows down the speed of the driver. Default is 1 (cache activated).

Special requirements for certain LCD controllers

None.