µC/GUI LCD Noritake Driver
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LCD Noritake Driver
Supported controllers
This driver has been tested with the following display:
- Noritake GU256X128C_3900 configured for the ’Graphic DMA Mode’
Bits per pixel
The supported color depth is 1 bpp.
Interfaces
The driver supports the 8-bit parallel (simple bus) interface.
Display data RAM organization
The picture above shows the relation between the display memory and the SEG and COM lines of the LCD.
Additional RAM requirements of the driver
This driver requires a display data cache, containing a complete copy of the contents of the display data RAM. The amount of memory used by the cache may be calculated as follows:
Size of RAM (in bytes) = (LCD_YSIZE + 7) / 8 * LCD_XSIZE
Additional driver functions
None.
Hardware configuration
This driver accesses the hardware with a simple bus interface as. The following table lists the macros which should be defined for hardware access:
| Macro |
Description |
| LCD_DAD |
Display address used for the communication protocol. Default value is display address 0. |
| LCD_INIT_CONTROLLER |
Initialization sequence for the display. |
| LCD_WRITE_A1 |
Writes a byte to the display. |
| LCD_WRITEM_A1 |
Writes multiple bytes to the display. |
|
