ESC Boston 2019: Using a Memory Protection Unit (MPU) with an RTOS

May 15 – May 15, 2019

Planning to be at Embedded System Conference 2019 in Boston? Come see Jean Labrosse (Software Architect, Silicon Labs) discuss using a memory protection unit MPU with an RTOS.

Embedded System Conference
May 15–16, 2019
Boston Convention & Exhibition Center

For more information, see the ESC Boston 2019 website.

Using a Memory Protection Unit (MPU) with an RTOS

Jean Labrosse (Software Architect, Silicon Labs)
Location: 108
Date: Wednesday, May 15
Time: 10:15am - 11:00am
Track: ESC Boston, Track E: Focus on Fundamentals, ESC Boston, Track B: Embedded Software Design & Verification

A Memory Protection Unit (MPU) is available in most Cortex-M microcontrollers yet, are seldom used in RTOS-based applications. This class will describe what an MPU is and how it can help make embedded systems more robust by preventing tasks from accessing memory or peripheral devices that are managed by other tasks.

The class will start with a quick overview of how typical RTOSs work without an MPU. I'll then show how an MPU can improve the reliability of an application by putting bounds on memory and peripheral access.

The MPU found in most Cortex-M microcontrollers will be used as an example of how an MPU works. I'll show how to properly use the MPU with an RTOS. Topics that will be discussed are:

  • Privilege modes
  • Limiting RTOS APIs for user code
  • Preventing code from executing out of RAM
  • Sharing data
  • Keeping RTOS objects in RTOS space
  • Handling faults
  • Creating MPU process tables
  • And more ....


Embedded developers concerned with the safety and security of their RTOS-based embedded design can benefit from adding the protection provided by an MPU.

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