Problem about uCOS III on SAMA5D2

Problem about uCOS III on SAMA5D2

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This topic contains 1 reply, has 2 voices, and was last updated by  Matt Gordon 2 years, 9 months ago.

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  • #20123

    xzp xzp
    Participant

    Hi,
    I download the demo of Micrium_SAMA5D2-XULT_OS3. After compiled on EWARM platform to generate OS3.bin code. It can run well on my SAMA5D2-Xplained board. It just run in internal ram.Now i want to link the bin code to run in external ram(DDR). I edit the .icf file, but the bin code cannot run after recompiled. I do not know why? here is my ddram.icf file.

    define memory mem with size = 4G;
    define region VEC_region           = mem:[from 0x200000 size 0x100];
    define region RAM_region           = mem:[from 0x200000+0x100 to 0x21FFFF];
    define region DDRAM_region         = mem:[from 0x20000000 to 0x23FFFFFF];
    define region DDRAM_NOCACHE_region = mem:[from 0x24000000 to 0x24FFFFFF];
    
    define block CSTACK    with alignment = 8, size = 0x3000 { };
    define block IRQ_STACK with alignment = 8, size = 0x60   { };
    define block FIQ_STACK with alignment = 8, size = 0x60   { };
    define block ABT_STACK with alignment = 8, size = 0x40   { };
    define block UND_STACK with alignment = 8, size = 0x40   { };
    define block SYS_STACK with alignment = 8, size = 0x40   { };
    define block HEAP      with alignment = 4, size = 0x200  { };
    
    define block BSS with alignment = 32 { zi };
    
    define block SRAM  with alignment = 32 { section .region_sram  };
    define block DDRAM with alignment = 32 { section .region_ddr };
    define block DDR_NO_CACHE { section .region_ddr_nocache };
    
    initialize by copy with packing=none { readwrite };
    do not initialize  { readonly section .noinit };
    /* Warning: ICC still considers the sections below as zero-initialized, by default. */
    do not initialize  { section .region_sram };
    do not initialize  { section .region_ddr };
    do not initialize  { section .region_ddr_nocache };
    
    /*place at start of RAM_region { section .vectors };*/
    
    place in RAM_region { block SRAM };
    place in DDRAM_region { section .cstartup };
    place in DDRAM_region { ro };
    place in DDRAM_region { rw };
    
    place in DDRAM_region { block DDRAM };
    place in DDRAM_region { block BSS };
    place in DDRAM_region { block HEAP };
    place in DDRAM_region { block IRQ_STACK };
    place in DDRAM_region { block FIQ_STACK };
    place in DDRAM_region { block ABT_STACK };
    place in DDRAM_region { block UND_STACK };
    place in DDRAM_region { block SYS_STACK };
    place in DDRAM_region { block CSTACK };
    
    place in VEC_region { section .vectors };
    place in DDRAM_NOCACHE_region { block DDR_NO_CACHE };
    

    Thank you for your reply?

    • This topic was modified 2 years, 9 months ago by  xzp xzp.
    #20197

    Matt Gordon
    Keymaster

    Micrium does not currently have a project configured to run out of DDR memory on that board. However, it is typically the case that migrating a project from internal RAM to an external device requires not just linker command file changes, but the addition of initialization code (to establish, for example, the memory device’s timing parameters) as well. Did you add initialization code for your DDR memory to your new project?

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