Xilinx SDK IDE exception after breakpoint/step-into or step-over on Xilinx Zynq

Xilinx SDK IDE exception after breakpoint/step-into or step-over on Xilinx Zynq

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This topic contains 3 replies, has 3 voices, and was last updated by  Sharbel Bousemaan 2 weeks ago.

Viewing 4 posts - 1 through 4 (of 4 total)
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  • #28202

    Dick Lin
    Participant

    Hi,

    I am pretty new for XILINX SDK IDE but I do have experience using other MCU company’s Eclipse-based IDE.

    I am currently work on a board using Xilinx Zynq UltraScale+ MPSoC/uCOS-III RTOS. The issue I have is after breakpoint hit, then either F5/F6 both will cause OS_CPU_ARM_ExceptIrqHndlr exception.

    The exception seems to be uCOS porting assembly code – see below. I don’t think we modify those uCOS file at all.

    Any thoughts on this failure?

    @ Generic ARM Cortex-A Port
    @
    @ File : OS_CPU_A_VFP-D32.S

    OS_CPU_ARM_ExceptIrqHndlr:
    SUB LR, LR, #4 @ LR offset to return from this exception: -4.
    STMFD SP!, {R0-R3} @ Push working registers.
    MOV R2, LR @ Save link register.
    MOV R0, #OS_CPU_ARM_EXCEPT_IRQ @ Set exception ID to OS_CPU_ARM_EXCEPT_IRQ.

    Thx

    Dick

    #28215

    Farukh Chaudhry
    Participant

    Hello,

    I am familiar with Eclipse, but in your case, you don’t have any problem without breakpoints? Can you test your port with a only the idle task running and see if hitting a breakpoint still results in an error.

    #28216

    Dick Lin
    Participant

    Our code running just fine without issue, just not SDK F5/F6. Hitting breakpoint seems fine. One of my coworker said his experience step-over is fine, I will verify this.

    #28221

    Can you please provide the following information:
    1. Version of Xilinx SDK
    2. Version of the uCOS Repository

    Regards,
    Sharbel

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